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EMC1001 1.5C SMBus Temperature Sensor in Miniature SOT-23
PRODUCT FEATURES
General Description
The EMC1001 is a tiny SMBus temperature sensor with 1.5C accuracy and two interrupts. Packaged in a SOT23-6, the EMC1001 provides an accurate, low-cost, low-current, solution for critical temperature monitoring in a PC or embedded applications. The EMC1001 generates two separate interrupts with programmable thermal trip points. The THERM output operates as a thermostat with programmable threshold and hysteresis. The ALERT output can be configured as a maskable SMBus alert with programmable window comparator limits, or as a second THERM output. An efficient fan control system can be created since this output may be used to control a fan. A power down mode extends battery life in portable applications. Each part number may be configured to respond to one of four separate SMBus addresses.
Datasheet
Features
Self Contained Internal Temperature Sensor
-- 0.25C resolution -- 1.5C Accuracy 40C to 85C
Small 6-lead SOT lead-free RoHS compliant packages SMBus address selected by external resistor
-- Select 1 of 4 per package, 8 addresses available
Maskable Interrupt using ALERT One-shot Command during standby Low Power, 3.0V to 3.6V Supply
-- 47uA at 0.0625 Conversions per Second (Typical) -- 4.8uA in Standby (Typical)
SMBus 2.0 Compliant interface Programmable temperature conversion rate
Applications
Desktop and Notebook Computers Thermostats Smart batteries Industrial/Automotive Other Electronic Systems
Simplified Block Diagram
EMC1001
Address Pointer Register Switching Current Limit Comparator Conversion Rate Register High Limit Registers Digital Mux Low Limit Registers THERM Limit Register THERM Hysteresis Register Configuration Register Status Register Interrupt Masking SMBus Interface
Internal Temp Diode
10-bit delta-sigma ADC
Temperature Register
SMCLK SMDATA ALERT THERM
SMSC EMC1001
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Revision 1.6 (01-29-07)
1.5C SMBus Temperature Sensor in Miniature SOT-23 Datasheet
Order Number(s): EMC1001-AFZQ-TR for 6 pin, SOT 23 Lead-Free RoHS compliant package (tape and reel) EMC1001-1-AFZQ-TR for 6 pin, SOT 23 Lead-Free RoHS compliant package (alternate addresses, tape and reel) See Table 1.2, "SMBus Address Configuration Information," on page 3
Reel size is 8,000 pieces.
80 ARKAY DRIVE, HAUPPAUGE, NY 11788 (631) 435-6000, FAX (631) 273-3123 Copyright (c) 2007 SMSC or its subsidiaries. All rights reserved. Circuit diagrams and other information relating to SMSC products are included as a means of illustrating typical applications. Consequently, complete information sufficient for construction purposes is not necessarily given. Although the information has been checked and is believed to be accurate, no responsibility is assumed for inaccuracies. SMSC reserves the right to make changes to specifications and product descriptions at any time without notice. Contact your local SMSC sales office to obtain the latest specifications before placing your product order. The provision of this information does not convey to the purchaser of the described semiconductor devices any licenses under any patent rights or other intellectual property rights of SMSC or others. All sales are expressly conditional on your agreement to the terms and conditions of the most recently dated version of SMSC's standard Terms of Sale Agreement dated before the date of your order (the "Terms of Sale Agreement"). The product may contain design defects or errors known as anomalies which may cause the product's functions to deviate from published specifications. Anomaly sheets are available upon request. SMSC products are not designed, intended, authorized or warranted for use in any life support or other application where product failure could cause or contribute to personal injury or severe property damage. Any and all such uses without prior written approval of an Officer of SMSC and further testing and/or modification will be fully at the risk of the customer. Copies of this document or other SMSC literature, as well as the Terms of Sale Agreement, may be obtained by visiting SMSC's website at http://www.smsc.com. SMSC is a registered trademark of Standard Microsystems Corporation ("SMSC"). Product names and company names are the trademarks of their respective holders. SMSC DISCLAIMS AND EXCLUDES ANY AND ALL WARRANTIES, INCLUDING WITHOUT LIMITATION ANY AND ALL IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE, AND AGAINST INFRINGEMENT AND THE LIKE, AND ANY AND ALL WARRANTIES ARISING FROM ANY COURSE OF DEALING OR USAGE OF TRADE. IN NO EVENT SHALL SMSC BE LIABLE FOR ANY DIRECT, INCIDENTAL, INDIRECT, SPECIAL, PUNITIVE, OR CONSEQUENTIAL DAMAGES; OR FOR LOST DATA, PROFITS, SAVINGS OR REVENUES OF ANY KIND; REGARDLESS OF THE FORM OF ACTION, WHETHER BASED ON CONTRACT; TORT; NEGLIGENCE OF SMSC OR OTHERS; STRICT LIABILITY; BREACH OF WARRANTY; OR OTHERWISE; WHETHER OR NOT ANY REMEDY OF BUYER IS HELD TO HAVE FAILED OF ITS ESSENTIAL PURPOSE, AND WHETHER OR NOT SMSC HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
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Chapter 1 Pin Configuration
ADDR/THERM GND VDD
1 2 3
6 5 4
SMDATA ALERT/THERM2 SMCLK
Figure 1.1 EMC1001 Pin Configuration Table 1.1 Pin Description PIN ADDR/THERM PIN NO. 1 DESCRIPTION Logic output that can be used to turn on/off a fan or throttle a CPU clock in the event of an over-temperature condition. This is an open-drain output. This pin is sampled following power up and the value of the pull up resistor determines the SMBus slave address per Table 1.2.Total capacitance on this pin must not exceed 100 pF, and the pull-up resistor must be connected to the same supply voltage as VDD Ground. Supply Voltage, 3.0V to 3.6V. SMBus clock input. Logic output used as interrupt, SMBus alert or as a second THERM output. This is an open-drain output. SMBus data input/output, open drain output.
GND VDD SMCLK
ALERT/THERM2
2 3 4 5 6
SMDATA
Table 1.2 SMBus Address Configuration Information ADDR/THERM PULL-UP RESISTOR 7.5k 5% Note 1.1, Note 1.2 12k 5% Note 1.2 20k 5% Note 1.2 33k 5% Note 1.2 EMC1001-1 7.5k 5% Note 1.1, Note 1.2 12k 5% Note 1.2 20k 5% Note 1.2 33k 5% Note 1.2 Note 1.1 Note 1.2 SMBUS ADDRESS 1001 000b 1001 001b 0111 000b 0111 001b 1001 010b 1001 011b 0111 010b 0111 011b PACKAGE DESCRIPTION 6-Lead SOT-23 6-Lead SOT-23 6-Lead SOT-23 6-Lead SOT-23 6-Lead SOT-23 6-Lead SOT-23 6-Lead SOT-23 6-Lead SOT-23
PART NUMBER EMC1001
This value must be greater than 1k 5% and less than or equal to 7.5k 5%. The pull-up resistor must be connected to VDD (pin 1), and the total capacitance on this pin must be less than 100pF.
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Table 1.3 Absolute Maximum Ratings PARAMETER Supply Voltage VDD Voltage on ALERT/THERM2, SMDATA and SMCLK pins Voltage on any other pin Operating Temperature Range Storage Temperature Range Lead Temperature Range Package Thermal Characteristics for SOT23-6 Power Dissipation Thermal Resistance ESD Rating, All Pins (Human Body Model) TBD 111.5 2000 mW @ 70oC
oC/W
RATING -0.3 to 5.0 -0.3 to 5.5 -0.3 to VDD+0.3 -25 to +125 -55 to +150 Refer to JEDEC Spec. J-STD-020 V V V C C
UNIT
V
Note: Stresses above those listed could cause damage to the device. This is a stress rating only and functional operation of the device at any other condition above those indicated in the operation sections of this specification is not implied. When powering this device from laboratory or system power supplies, it is important that the Absolute Maximum Ratings not be exceeded or device failure can result. Some power supplies exhibit voltage spikes on their outputs when the AC power is switched on or off. In addition, voltage transients on the AC power line may appear on the DC output. If this possibility exists, it is suggested that a clamp circuit be used.
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Datasheet
Chapter 2 Electrical Characteristics
Table 2.1 Electrical Characteristics
VDD=3.0V to 3.6V, TA= -25C to +125C, Typical values at TA = 27C unless otherwise noted
PARAMETER DC Power Supply Voltage Average Operating Current
SYMBOL
MIN
TYP
MAX
UNITS
CONDITIONS
VDD IDD
3.0
3.3 47
3.6 TBD
V A 0.0625 conversion/s See Table 4.6, "Conversion Rates," on page 14 Standby mode
IPD Temperature Measurement Accuracy
4.8
10
A
0.5 1
1.5 3
C C C ms
40CTA85C -25CTA125C
Resolution Conversion Time Voltage Tolerance Voltage at pin (ADDR/THERM, ) Voltage at pin (ALERT/THERM2, SMDATA,SMCLK) VTOL VTOL -0.3 -0.3
0.25 26
3.6 5.5
V V
Digital Outputs (ADDR/THERM, ALERT/THERM2) Output Low Voltage High Level Leakage Current SMBus Interface (SMDATA,SMCLK) Input High Level Input Low Level Input High/Low Current Hysteresis Input Capacitance Output Low Sink Current SMBus Timing Clock Frequency Spike Suppression FSMB 10 400 50 kHz ns 6 VIH VIL IIH/IIL -1 500 5 2.0 0.8 1 V V A mV pF mA SMDATA = 0.6V VOL IOH 0.1 0.4 1 V A IOUT=-4mA VOUT=VDD
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Table 2.1 Electrical Characteristics (continued)
VDD=3.0V to 3.6V, TA= -25C to +125C, Typical values at TA = 27C unless otherwise noted
PARAMETER Bus free time Start to Stop Hold time Start Setup time Start Setup time Stop Data Hold Time Data Setup Time Clock Low Period Clock High Period Clock/Data Fall Time Clock/Data Rise Time
SYMBOL TBUF THD:STA TSU:STA TSU:STO THD:DAT TSU:DAT TLOW THIGH TF TR
MIN 1.3 0.6 0.6 0.6 0.3 100 1.3 0.6 * *
TYP
MAX
UNITS s s s s s ns s s
CONDITIONS
300 300 Note 2.1 400
ns ns
*Min = 20+0.1Cb ns *Min = 20+0.1Cb ns
Capacitive Load (each bus line) Note 2.1
Cb
0.6
pF
300nS rise time max is required for 400kHz bus operation. For lower clock frequencies, the maximum rise time is (0.1/FSMB)+50nS
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Chapter 3 System Management Bus Interface Protocol
A host controller, such as an SMSC I/O controller, communicates with the EMC1001 via the two wire serial interface named SMBus. The SMBus interface is used to read and write registers in the EMC1001, which is a slave-only device. A detailed timing diagram is shown in Figure 3.1.
T LO W
T H IG H
T H D :STA TF
T SU :S TO
TR
SM CLK
T H D :S TA T H D :D A T T S U :D AT T SU :S TA
SM DA TA
TBUF
P
S
S - S tart C ondition
S
P - Stop Condition
P
Figure 3.1 System Management Bus Timing Diagram The EMC1001 implements a subset of the SMBus specification and supports Write Byte, Read Byte, Send Byte, Receive Byte, and Alert Response Address protocols. as shown. In the tables that describe the protocol, the "gray" columns indicate that the slave is driving the bus.
3.1
Write Byte
The Write Byte protocol is used to write one byte of data to the registers as shown below: Table 3.1 SMBus Write Byte Protocol
START 1
SLAVE ADDRESS 7
WR 1
ACK 1
COMMAND 8
ACK 1
DATA 8
ACK 1
STOP 1
3.2
Read Byte
The Read Byte protocol is used to read one byte of data from the registers as shown below: Table 3.2 SMBus Read Byte Protocol
START
SLAVE ADDRESS
WR
ACK
COMMAND
ACK
START
SLAVE ADDRESS
RD
ACK
DATA
NACK
STOP
1
7
1
1
8
1
1
7
1
1
8
1
1
3.3
Send Byte
The Send Byte protocol is used to set the Internal Address Register to the correct Address. The Send Byte can be followed by the Receive Byte protocol described below in order to read data from the register. The send byte protocol cannot be used to write data - if data is to be written to a register then the write byte protocol must be used as described in subsection above. The send byte protocol is shown in Table 3.3.
Table 3.3 SMBus Send Byte Protocol FIELD: Bits:
SMSC EMC1001
START 1
SLAVE ADDR 7
WR 1
7
ACK 1
REG. ADDR 8
ACK 1
STOP 1
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3.4
Receive Byte
The Receive Byte protocol is used to read data from a register when the internal register address pointer is known to be at the right location (e.g. set via Send Byte). This can be used for consecutive reads of the same register as shown below: Table 3.4 SMBus Receive Byte Protocol
FIELD: Bits:
START 1
SLAVE ADDR 7
RD 1
ACK 1
REG. DATA 8
NACK 1
STOP 1
3.5
Alert Response Address
The ALERT/THERM2 output can be used as an SMBALERT# as described in 4.3, "ALERT/THERM2 Output," on page 11. The Alert Response Address is polled by the Host whenever it detects an SMBALERT#, i.e. when the ALERT/THERM2 pin is asserted. The EMC1001 will acknowlege the Alert Response Address and respond with its device address as shown below.
Table 3.5 Modified SMBus Receive Byte Protocol Response to ARA ALERT RESPONSE ADDRESS 7
FIELD: Bits:
START 1
RD 1
ACK 1
EMC1001 SLAVE ADDRESS 8
NACK 1
STOP 1
3.6
SMBus Addresses
The EMC1001 is available in two versions, each of which has four 7-bit slave addresses that are enabled based on the pull-up resistor on the ADDR/THERM pin. The value of this pull up resistor determines the slave address per Table 1.2 on page 3. Attempting to communicate with the EMC1001 SMBus interface with an invalid slave address or invalid protocol results in no response from the device and does not affect its register contents. The EMC1001 supports stretching of the SMCLK signal by other devices on the SMBus but will not perform this operation itself. The EMC1001 has an SMBus timeout feature. Bit 7 of the SMBus Timeout Enable register enables this function when set to 1 (the default setting is 0). When this feature is enabled, the SMBus will timeout after approximately 25ms of inactivity.
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Chapter 4 Product Description
The EMC1001 is an SMBus temperature that monitors a single temperature zone. Thermal management is performed in cooperation with a host device. The host reads the temperature data from the EMC1001 and takes appropriate action such as controlling fan speed or processor clock frequency. The EMC1001 has programmable temperature limit registers that define a safe operating window. After the host has configured the temperature limits, the EMC1001 can operate as a free-running independent watchdog to warn the host of temperature hot spots without requiring the host to poll the device. The ADDR/THERM output can be used to control a fan without host intervention.
EMC1001 SMCLK SMDATA Internal Diode ALERT/THERM2
Host
SMBus Interface
ADDR/THERM
Fan Driver
Figure 4.1 Controlling a fan without host intervention. The EMC1001 has two basic modes of operation: Run Mode: In this mode, the EMC1001 continuously converts temperature data and updates its registers. The rate of temperature conversion is configured as shown in Section 4.9 on page 14. Standby Mode: In this mode, the EMC1001 is placed in standby to conserve power as described in Section 4.5 on page 12.
4.1
Temperature Monitors
Thermal diode temperature measurements are based on the change in forward bias voltage (VBE) of a diode when operated at two different currents: where:
VBE = VBE _ HIGH - VBE _ LOW
I ln HIGH = I q LOW
kT

k = Boltzmann's constant T = absolute temperature in Kelvin q = electron charge
= diode ideality factor
The change in
VBE voltage is proportional to absolute temperature T.
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VDD Ihigh Ilow Ibias
Internal or Remote Diode
Bias Diode
Delta Vbe Sample & Hold
1-bit delta-sigma Modulator
Digital Averaging Filter
10-bit Output
Figure 4.2 Detailed Block Diagram Figure 4.2 shows a detailed block diagram of the temperature measurement circuit. The EMC1001 incorporates switched capacitor technology that integrates the temperature diode VBE from different bias currents. The negative terminal, DN, for the temperature diode is internally biased with a forward diode voltage referenced to ground. The advantages of this architecture over Nyquist rate FLASH or SAR converters are superb linearity and inherent noise immunity. The linearity can be directly attributed to the delta-sigma ADC single-bit comparator while the noise immunity is achieved by the ~20ms integration time which translates to 50Hz input noise bandwidth.
4.2
Temperature Measurement Results and Data
The 10-bit temperature measurement results are stored in temperature value registers. Table 4.1 shows the two's complement temperature data format with an LSB equivalent to 0.25C. Table 4.1 Temperature Data Format VALID RANGE -40C TO 125C TEMPERATURE -0.25C 0.0C +0.25C +0.50C +0.75C +1C +125C Note 4.1 Note 4.2 TWO'S COMPLEMENT 1111 1111 11 Note 4.1 0000 0000 00 0000 0000 01 0000 0000 10 0000 0000 11 0000 0001 00 0111 1101 00 Note 4.2
Temperature measurement returns 1100 0000 00 for all temperatures -64.00C Temperature measurement returns 0111 1111 11 for all temperatures +127.75C
The eight most significant bits are stored in the Temperature Value High Byte register and the two least significant bits stored in the Temperature Value Low Byte register as outlined in Table 4.2. The six LSB positions of the Temperature Value Low Byte register always read zero. In Table 4.2, the upper case
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"B" shows the bit position of a 16-bit word created by concatenating the High Byte and Low Byte, and the lower case "b" shows the bit position in the 10-bit value.
Table 4.2 Bit Position of Two Byte Values HIGH BYTE LOW BYTE
B15 b9
B14 b8
B13 b7
B12 b6
B11 b5
B10 b4
B9 b3
B8 b2
B7 b1
B6 b0
B5 0
B4 0
B3 0
B2 0
B1 0
B0 0
4.3
ALERT/THERM2 Output
The ALERT/THERM2 output asserts if an out of limit measurement is detected (TA low limit or TA > high limit). The ALERT/THERM2 pin is an open drain output and requires a pull up resistor to VDD.The ALERT/THERM2 pin can be used as an SMBALERT#, or may be configured as a second THERM output. As described in the SMBus specification, an SMBus slave may inform the SMBus master that it wants to talk by asserting the SMBALERT# signal. One or more ALERT outputs can be hardwired together as a wired-or bus to a common input. The ALERT/THERM2 pin resets when the EMC1001 responds to an alert response address (ARA=0001 100) sent by the host, and if the out of limit condition no longer exists, but it does not reset if the error condition remains. The ALERT/THERM2 pin can be masked so that it will not assert in the event of an out of limit temperature measurement, except when it is configured as a second THERM pin.
Temp
Temperature High Limit SMBus ARA Temperature Low Limit
Logic Level
Logic High
ALERT/THERM2 Time
Figure 4.3 ALERT Response to Temperature Limits Exceeded
The ALERT/THERM2 pin can be configured as a second THERM pin that asserts when the temperature measurement exceeds the Temperature High Limit value. In this mode, the output will not de-assert until the temerature drops below the Temperature High Limit minus the THERM Hysteresis value.
4.4
ADDR/THERM Output
The ADDR/THERM output asserts if the temperature measurement exceeds the programmable THERM limit. It can be used to drive a fan or other failsafe devices. The ADDR/THERM pin is open drain and requires a pull up resistor to VDD. The value of this pull up resistor determines the slave address per Table 1.2 on page 3. The ADDR/THERM pin cannot be masked. When the ADDR/THERM pin is asserted, it will not de-assert until the temperature drops below the THERM limit minus the THERM hysteresis value.
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Temp
THERM Limit THERM Limit - THERM Hysterisis
THERM Hysteresis
Logic Level
Logic High
THERM Time
Figure 4.4 THERM Response to THERM Limit Exceeded
4.5
Standby Mode
The EMC1001 can be set to standby mode (low power) by setting a bit in the Configuration Register as described in Section 4.8 on page 13. This shuts down all internal analog functions while the SMBus remains enabled. When the EMC1001 is in standby mode, a One-Shot command measurement can be initiated. The user may also write new values to the limit registers described in Section 4.10 on page 15 while in standby. If the previously stored temperature is outside any of the new limits, the ALERT/THERM2 output will respond as described in Section 4.3 and the ADDR/THERM output will respond as described in Section 4.4.
4.6
Register Allocation
The following registers shown in Table 4.3 are accessible through the SMBus:
Table 4.3 Register Map REGISTER ADDRESS (HEX) R/W
REGISTER NAME
POWER-ON DEFAULT
00 01 02 03 04 05 06 07 08 0F 20 21 22 FD FE FF
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R R R R/W R/W R/W R/W R/W R/W W R/W R/W R/W R R R
Temperature Value High Byte Status Temperature Value Low Byte Configuration Conversion Rate Temperature High Limit High Byte Temperature High Limit Low Byte Temperature Low Limit High Byte Temperature Low Limit Low Byte One-Shot THERM Limit THERM Hysteresis SMBus Timeout Enable Product ID Register Manufacture ID Revision Number
12
0000 0000 undefined 0000 0000 0000 0000 0000 0100 0101 0101 (85C) 0000 0000 0000 0000 (0C) 0000 0000 N/A 0101 0101 (85C) 0000 1010 (10C) 0000 0001 0000 0000 (EMC1001) 0000 0001 (EMC1001-1) 0101 1101 0000 0011 Note 4.3
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Note 4.3
Revision number may change. Please obtain the latest version of this document from the SMSC web site.
At device power-up, the default values are stored in all registers. A power-on-reset is initiated when power is first applied to the part and the VDD supply exceeds the POR threshold. Reads of undefined registers will return 00h and writes to undefined registers will be ignored. The EMC1001 uses an interlock mechanism that locks the low byte value when the high byte register is read. This prevents updates to the low byte register between high byte and low byte reads. This interlock mechanism requires that the high byte register always be read prior to reading the low byte register.
4.7
Status Register
The status register is a read only register that stores the operational status of the part. When either TLOW or THIGH are set (TA low limit or TA > high limit) and the ALERT/THERM2 pin is not masked, the ALERT/THERM2 pin will assert. See Section 4.3 on page 11 for more details on the ALERT function.
Table 4.4 Status Register STATUS REGISTER
BIT
NAME
FUNCTION
7 6 5 4 3 2 1 0
Busy THIGH TLOW
1 when ADC is converting 1 when Temperature High Limit is exceeded 1 when Temperature Low Limit is exceeded Reserved Reserved Reserved Reserved
THRM
1 when THERM limit is exceeded
Bit 7 indicates that the ADC is busy converting a value. Bits 6 and 5 indicate that the temperature measurement is above or below the limits respectively. Bit 0 indicates that the measured temperature has exceeded the THERM limit. When bit 0 goes high the ADDR/THERM output will be asserted. Each bit is cleared individually when the status register is read, provided that the error condition for that bit no longer exists. The ALERT/THERM2 output is latched and will not be reset until the host has responded with an alert response address (ARA=0001 100). The ALERT/THERM2 output will not reset if the status register has not been cleared.
4.8
Configuration Register
The configuration register controls the functionality of the temperature measurements.
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Table 4.5 Configuration Register CONFIGURATION REGISTER BIT NAME FUNCTION DEFAULT
7 6 5 4-0
MASK1 RUN/STOP
ALERT or THERM2
0 = ALERT enabled 1 = ALERT disabled 0 = Active mode (continuously running) 1 = Standby mode 0 = ALERT 1 = THERM2
0 0 0 0
Reserved
Bit 7 is used to mask the ALERT/THERM2 signal. When this bit is set to 0, any out of limit condition will assert ALERT/THERM2. This bit is ignored if the ALERT/THERM2 pin is configured as THERM2 signal by bit 5. Bit 6 initiates ADC conversions. When this bit is low, the ADC will convert temperatures in a continuous mode. When this bit is high, the ADC will be in standby mode, thus reducing supply current significantly though the SMBus will still be active. If bit 6 is 1 and the one-shot register is written to, the ADC will execute a temperature measurement and then return to standby mode. Bit 5 sets the ALERT/THERM2 pin to act as either an SMBALERT# signal or as the THERM2 signal. If bit 5 is set to 1 the ALERT/THERM2 pin acts as the THERM2 signal and bit 7 is ignored.
4.9
Conversion Rate Register
The conversion rate register determines how many times the temperature value will be updated per second. The lowest 4 bits configure a programmable delay that waits between consecutive conversion cycles to obtain the desired conversion rate. Table 4.6 shows the conversion rate and the associated quiescent current.
Table 4.6 Conversion Rates CONVERSION RATE VALUE CONVERSIONS/SECOND TYPICAL QUIESCENT CURRENT (A)
00h 01h 02h 03h 04h 05h 06h 07h 08h 09h 0Ah to FFh
0.0625 0.125 0.25 0.5 1 2 4 8 16 32 Reserved
36 37 38 40 44 54 71 109 182 326
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4.10
Limit Registers
The user can configure high and low temperature limits and an independent THERM limit. The temperature high limit (TH) is a 10-bit value that is set by the Temperature High Limit High Byte register and the Temperature High Limit Low Byte register. The Temperature High Limit Low Byte register contains the two least significant bits as shown in Table 4.2 on page 11. The two least significant bits are stored in the upper two bits of the register, and the six LSB positions of this register always read zero. The temperature low limit (TL) is a 10-bit value that is set by the Temperature Low Limit High Byte register and the Temperature Low Limit Low Byte register as shown in Table 4.2 on page 11. The limits are compared to the temperature measurement results (TINT) and have been exceeded if (TINT TL or TINT > TH). If either limit is exceeded then the appropriate bit is set high in the status register and the ALERT/THERM2 output will respond as described in Section 4.3 on page 11. The THERM limit (TTH) is a single byte value set by the THERM Limit register. Exceeding the THERM limit asserts the ADDR/THERM signal as described in Section 4.4 on page 11. When the ALERT/THERM2 pin is configured as THERM2, then exceeding the high limit asserts this pin.
4.11
THERM Hysteresis Register
The THERM hysteresis register holds a hysteresis value that determines the de-assertion of THERM as shown in Figure 4.4 on page 12. It defaults to 10C and can be set by the user at any time after power up. When the ALERT/THERM2 pin is configured as THERM2, then the hysteresis value also impacts the de-assertion of THERM2.
4.12
One-Shot Register
Writing to the one-shot register while in standby mode initiates a conversion and comparison cycle. The EMC1001 will execute a temperature measurement, compare the data to the limit registers and return to the standby mode. A write to the one-shot register will be ignored if it occurs while the EMC1001 is in run mode.
4.13
SMBus Timeout Enable
The EMC1001 has an SMBus timeout feature. Bit 7 of the SMBus Timeout Enable register enables this function when set to 1 (the default setting is 0). When this feature is enabled, the SMBus will timeout after approximately 25ms of inactivity.
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Chapter 5 Package Outline
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Datasheet
1.5C SMBus Temperature Sensor in Miniature SOT-23
REVISION HISTORY
D
3 SEE DETAIL "A"
4
REVISION A
DES CRIPTION INITIAL RELEASE
DATE 7/07/04
RELEAS ED BY S .K.ILIEV
6
N
3
E1
E
1 INDEX AREA (D/2 x E1/2)
2
3
e
5X b
2
4
c
4
5
TOP VIEW
END VIEW
H
C A2 A
GAUGE PLANE
0.25 NOTES: 1. "N" IS THE TOTAL NUMBER OF LEADS . 2. TRUE POSITION SPREAD TOLERANCE IS 0.10mm AT MAXIMUM MATERIAL CONDITION. 3. PACKAGE BODY DIMENSION "D" DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MAXIMUM MOLD FLASH, PROTRUSIONS OR GATE BURRS IS 0.25 mm PER END. DIMENSION "E1" DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. MAXIMUM INTERLEAD FLASH OR PROTRUSION IS 0.25 mm PER SIDE. "D1" & "E1" DIMENSIONS ARE DETERMINED AT DATUM PLANE "H". 4. DIMENSIONS "b" & "c" APPLY TO THE FLAT SECTION OF THE LEAD BETWEEN 0.08 TO 0.15 mm FROM THE LEAD TIP. 5. DETAILS OF PIN 1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE INDEX AREA INDICATED (SEE TOP VIEW). 6. FIVE LEAD PACKAGE IS A VERSION OF 6 LEAD PACKAGE, WHERE LEAD #5 HAS BEEN REMOVED FROM 6 LEAD PACKAGE.
SEATING PLANE
A1 ccc C L1 L 0
SIDE VIEW
DETAIL "A" (SCALE: 2/1)
UNLESS OTHERWISE SPECIFIED DIMENSIONS ARE IN MILLIME TERS AND TOLERANCES ARE: DECIMAL 0.1 X.X X.XX 0.05 X.XXX 0.025 ANGULAR 1
THIRD ANGLE PROJECTION
80 ARKAY DRIVE HAUP PAUGE, NY 11788 USA
TITLE
DIM AND TOL PER ASME Y14.5M - 1994
MATERIAL
NAME
DRAWN
DATE
N = 5 LEADS
N = 6 LEADS
FINISH
-
S.K.ILIEV
CHECKED
7/06/04
DWG NUMBER
PACKAGE OUTLINE: 5/6 PIN SOT 1.6mm BODY WIDTH, 0.95mm PITCH
REV
3-D VIEWS
S.K.ILIEV
APPROVED
7/06/04
SCALE
MO-5/6 SOT-2.9x1.6
STD COMPLIANCE SHEET
A 1 OF 1
PRINT WITH "SCALE TO FIT" DO NOT SCALE DRAWING
S.K.ILIEV
7/07/04
1:1
JEDEC: MO-178 / AA, AB
Figure 5.1 EMC1001, 6 Pin SOT Package Outline; 1.6mm Body Width, 0.95mm Pitch

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